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There are several instructions for addition, subtraction and
multiplication on C62x CPU. The basic instructions are
ADD ,
SUB , and
MPY . Learn about these instructions in
the TI manual.
ADD and
SUB have 0 delay slots (meaning the
results of operation are immediately available), but the
MPY has 1 delay slot (the result of
multiplication is valid after additional 1 clock cycle).
(Add, subtract, and multiply): Write an assembly program
to compute
( 0000 ef35h + 0000 33dch - 0000
1234h ) * 0000 0007h
Intentionally left blank.
Often you need to control the flow of the program execution
by branching to another block of code. The
B instruction does the job in the C62x
CPU. The address of the branch can be specified either bydisplacement or stored in a register to be used by the
B instruction. Read and understand the
B instruction in the manual. The
B instruction has 5 delay slots,
meaning that the actual branch occurs in the 5th clock cycleafter the instruction is executed.
In many cases, depending on the result of previous
operations, you execute the branch instructionconditionally. For example, to implement a loop, you
decrement the loop counter by 1 each time you run a set ofinstructions and whenever the loop counter is not zero, you
need to branch to the beginning of the code block to iteratethe loop operations. In C62x CPU, this conditional
branching is implemented using the
conditional
operations . Although
B may be
the instruction implemented using conditional operationsmost often, all instructions in C62x can be conditional.
Conditional instructions are represented in code by using
square brackets,
[ ] , surrounding the
condition register name. For example, the following
B instruction is executed only if
B0 is nonzero:
1 [B0] B .L1 A0
To execute an instruction conditionally when the condition
register is zero, we use ! in front of the register. Forexample, the
B instruction is executed
when
B0 is zero.
1 [!B0] B .L1 A0
Not all registers can be used as the condition registers.
In C62x CPU, the registers that can be tested in conditionaloperations are
B0 ,
B1 ,
B2 ,
A1 ,
A2 .
(Simple loop): Write an assembly program computing the summation by implementing a simple loop.
Intentionally left blank.
The logical operations and bit manipulations are
accomplished by the
AND ,
OR ,
XOR ,
CLR ,
SET ,
SHL , and
SHR instructions. Read and understand the operations of these
instructions.
Other useful instructions include
IDLE and compare instructions such as
CMPEQ
The set of instructions that can be performed in each functional unit is as follows (See , , and ). Please refer to TMS320C62x/C67x CPU and Instruction Set Reference Guide for detailed description of each instruction.
| Instruction | Description |
|---|---|
ADD(U) |
signed or unsigned integer addition without saturation |
ADDK |
integer addition using signed 16-bit constant |
ADD2 |
two 16-bit integer adds on upper and lower register halves |
B |
branch using a register |
CLR |
clear a bit field |
EXT |
extract and sign-extend a bit field |
MV |
move from register to register |
MVC |
move between the control file and the register file |
MVK |
move a 16-bit constant into a register and sign extend |
MVKH |
move 16-bit constant into the upper bits of a register |
NEG |
negate (pseudo-operation) |
NOT |
bitwise NOT |
OR |
bitwise OR |
SET |
set a bit field |
SHL |
arithmetic shift left |
SHR |
arithmetic shift right |
SSHL |
shift left with saturation |
SUB(U) |
signed or unsigned integer subtraction without saturation |
SUB2 |
two 16-bit integer integer subs on upper and lower register halves |
XOR |
exclusive OR |
ZERO |
zero a register (pseudo-operation) |
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