Lecture notes

OpenStax

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Module 1: introduction to organization and architecture of computer

1 Organization and architecture

2 Structure and function

3 Brief history of computers

4 The first generation: vacuum tubes

5 The second generation: transistors

6 The 3th generation

Module 2: top-level view of computer organization

1 1. computer component

2 2. computer function

3 2.1 instruction fetch and execute

5 Execute cycle:

6 Instruction cycle state diagram:

7 2.2 interrupts

8 Interrupts and the instruction cycle

9 Multiple interrupts

10 3. interconnection structures

11 4. bus interconnection

12 Bus structure

13 The data lines (data bus):

14 The address lines ( address bus):

15 The control lines (control bus):

16 Multiple-bus hierarchies

17 Elements of bus design

19 Method of arbitration:

22 Data transfer type:

Module 3: computer arithmetic

1 1. the arithmetic and logic unit

2 2. integer representation

3 2.1 unsigned integer

4 2.2 signed integer

5 Sign-magnitude representation

6 Twos complement representation

7 Converting between different bit lengths

8 3. integer arithmetic

10 3.2 addition and subtraction:

11 Hardware for addition and subtraction:

12 3.3 multiplying positive numbers:

13 Hardware implementation of unsigned binary multiplication:

14 Execution of example:

15 Flowchart for unsigned binary multiplication:

16 3.4 multiplying negative numbers

19 3.5 division:

20 4. floating-point representation

21 4.1 principles

22 4.2 ieee standard for binary floating-point representation

23 5. floating-point arithmetic

Module 4: instruction set: characteristics and functions

1 1. machine instruction characteristics

2 1.1 what is an instruction set?

3 1.2 elements of an instruction

4 Instruction cycle state diagram

5 Instruction representation

6 1.3 instruction types

7 1.4 number of addresses

8 How many addresses?

9 1.5 design decisions

10 2. types of operands

12 2.2 characters

13 2.3 logical data

14 3. types of operations

15 3.1 data transfer

16 3.2 arithmetic

18 3.4 conversion

19 3.5 input/output

20 3.6 system controls

21 3.7 transfer of control

22 Branch instruction

23 Skip instructions

24 Procedure call instructions

25 4. addressing modes

26 4.1 immediate addressing

27 4.2 direct addressing

28 4.3 indirect addressing

29 4.4 register addressing

30 4.5 register indirect addressing

31 4.6 displacement addressing

Module 5: cpu structure and functions

1 Register organization

2 User-visible registers

3 Control and status registers

Module 6: control unit operation

1 1. micro-operation

2 1.1 the fetch cycle

3 1.2 the indirect cycle

4 1.3 the interrupt cycle

5 1.4 the execute cycle

6 1.5 the instruction cycle

7 2. control of the processor

8 2.1 functional requirements

9 2.2 control signals

10 2.3 internal processor organization

Module 7: microprogramming

1 1. basis concepts

2 2. control unit design approaches

3 2.1 approach of microprogrammed control unit

4 2.2 approach of hardwired logic

5 3. microprogrammed control unit

6 3.1 micro-instruction sequencing

7 3.2 micro-instruction execution

8 4. classification of micro-instructions

Module 8: instruction pipelining

1 1. pipelining

2 1.1 basic concepts

3 1.2 pipeline principle

4 2. pipeline performance and limitations

5 2.1 pipeline performance

6 2.2 pipeline limitations

7 3. superscalar and superpipelined processors

8 3.1 superpipeline designs

9 3.2 superscalar

10 3.3 instruction issue policy

Module 9: multilevel memories

1 1. computer memory system and characteristics

2 1.1 computer memory overview

3 1.2 characteristics of memory system

4 2. types of memory

5 3. memory hierarchy

6 3.1 memory system organization

7 3.2 multilevel memories organization

8 4. memory performance

Module 10: cahe memory

1 1. cache memory overview

2 2. cache organization and operations

3 2.1 direct mapping

4 2.2 associative mapping

5 2.3 set associative mapping

6 3. replacement algorithms

7 4. performances

8 4.1 write policy

9 4.2 block / line sizes

10 Number of caches

Module 11: internal memory

1 2. memory organization

2 2.1 memory organization from the memory chip

3 2.2 error correction

Module 12: external memory

Module 13: input/output

Module 14: operating system support

1 1. introduction to operating system (os)

2 2. os scheduling

3 3. os memory management

Module 15: virtual memory

Module 16: advanced architectures

Source: OpenStax, Computer architecture. OpenStax CNX. Jul 29, 2009 Download for free at http://cnx.org/content/col10761/1.1

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