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9.13 Sspd_chapter 7_part 4_cmos lay-out design rules_continued2.

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SSPD_Chapter 7_Part 4_continued2 gives the design rules for the minimum width for the metal interconnect,poly-silicon line and diffusion line.It gives the design rule for the spacing between metal-metal,poly-poly , diffusion-diffusion and between diffusion-poly.

SSPD_Chapter 7_part 4_CMOS lay-out design rules_continued2.

7.4.3.Lambda Based Design Rules.

Every Foundry follows a standard. The foundry allows the designers to submit designs using a state-of the-art process. They permit widths, spacings and distances on the layout to be written in the form mλ where λ = half channel length.

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Source:  OpenStax, Solid state physics and devices-the harbinger of third wave of civilization. OpenStax CNX. Sep 15, 2014 Download for free at http://legacy.cnx.org/content/col11170/1.89
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