8.7 Sspd_chapter 6_part 5_crossing of the rubicon_emergence of mos

SSPD_Chapter 6_Part 5_ Crossing of the Rubicon_Emergence of MOS Technolgy as the dominant IC Technology.

(“MOS Technology,1963-1974: A Dozen Crucial Years” by Ross Knox Bassett, The Electrochemical Society Interface , Fall 2007,pp 46-50)

An ancient Roman Law forbade any Roman General from crossing the river Rubicon and enter Italy proper with a standing army. In January 49BC an edict was issued by the Senate instructing the Governor of Gaul , Julius Caeser, to resign from his post and disband his army. Instead Julius Caeser defied the edict and with his standing army he crossed the Rubicon river and defeated Pompey, the Roman Emperor. This was a pivotal event and marked the emergence of Roman Empire and genesis of modern European Culture.

During the period 1963-66, the concerted efforts of Bruce Deal, Andrew Grove and Ed Snow at Fairchild and systematic works carried out by NEC, IBM and Phillips identified sodium contaminations as the source of instability and resolved the yield and reliability issues. But due to the slow speed of MOS devices which is inherent in 10µm long channel length, in 1965 IBM’s Corporate Technical Committee issued a directive to IBM Research Group asking them to halt all works on MOS Technology. Instead IBM Research Group redoubled its efforts in application areas where MOS could be suitably applied. In 1966, an important breakthrough was made in the fabrication of memory cells at IBM. Till then six BJT was required to build 1-bit memory cell. But Robert Dennard showed that using MOS , one-transistor memory cell could be built. This was a great economy of real estate on Silicon Surface and large – size memory could be accommodated on a chip. The slow speed of MOS did not come in the way of commercializing a MOS memory chip. So MOS memories became a hot topic of Research in IBM. By 1970 MOS emerged as the dominant IC Technology. This crucial work done in 1963-66 , already described in the previous chapter, and the subsequent defiance of IBM Research Group to persist in MOS research is likened to “Crossing of the Rubicon”. By mid-1970s MOS technology was established as a commercially successful and sustainable technology.

1964_General Microelectronics introduced first commercial MOS IC calculator. It had 23 custom IC Chips.

1968_MOS Memories gave three-fold advantage in terms of packing density with respect to bipolar memories and also because of saturation in the performance of magnetic memories, IBM decided that their computer systems would use MOS memories after initial phase-in period using bipolar technology.

1968_Robert Noyce and Gordon Moore left Fairchild and established INTEL where they concentrated exclusively on MOS Technology for commercial production of memories and micro-processors. Subsequently this group was joined by Andy Grove.

1969_Rockwell Microelectronics was able to include all the functions in 4 MOS IC chips fabricated for SHARP’s first portable calculator micro-compet QT-8D .

1971_Mostek and Texas Instrument introduced single chip calculator.

1972_IBM systems were introduced with 1024 bit MOS memory chips. At almost the same time MOS technology found an organizational home in IBM, Burlington, Vermont.

At Intel, it was decided to adopt self-aligning Silicon gate MOS Technology developed at BELL Labs. The self-aligning feature had a further packing density advantage. This technology helped produce stable devices in mass scale. Intel after an initial failure in marketing 256 bit MOS memory chip, successfully marketed 1-kbit MOS memory chip code number 1103 to Honeywell. The 1103 chip became a standard memory chip for non-IBM computer systems.

Besides MOS memory chips, Intel also successfully introduced MOS microprocessor chips and Erasable, Programmable ROM (EPROM).

1974_Intel introduced 4kbit MOS memory chips and second generation MOS microprocessor chip namely 8080.

By 1974 in a land mark paper by Robert Dennard et al, “ Device Scaling Limits of Si MOSFETs ... with Very Small Dimensions,” IEEE Journal Solid State Circuits Vol 9, 1974, pp 256, the scaling principles were outlined. It was shown that scaling of dimensions by a factor scaled the time delay by the same factor and scaled down the power consumption as square of that factor.

Scaling became the treadmill for advancing the level of integration from micron to sub-micron level to deep sub-micron level and now we are advancing level of integration to ultra deep sub-micron level. Probably in next 10 years this treadmill of advancing the miniaturization will stop at nano level. Beyond this what alternative technology will become the treadmill for advancing miniaturization remains an unanswered question.This alternative technology could be graphene, spintronics or it could be genetics.Future will settle this question.

MOS Technology could reach its commanding heights first because of research in physics and chemistry MOS structures; second because product design and development to create ICs that had some advantages over bipolar ICs; and third because of organizational change to create environments where MOS technology could thrive. As we saw that the establishment of Intel went a long way in establishing the economic viability and technical feasibility of MOS Technology.