4.3 Laboratory timers: lab4 - buzzer tone generator

Laboratory timers: lab4 - buzzer tone generator

Introduction

Correct system timing is a fundamental requirement for the proper operation of a real-time application. The timing definition can dictate how the data information processed during the execution of the application program. The clock implementations vary between devices in the MSP430 family. Each device provides different clock sources, controls and uses. This chapter discusses the clock controls included in the platforms used.

The MSP430 4xx family has two general-purpose 16-bit or 8-bit counters and event timers, named Timer_A, Timer_B, and a Basic Timer. The Basic Timer module is only implemented in ‘4xx devices. The 2xx device family also has Timer_A and Timer_B, but the clock signals are provided by the basic clock module+.

The timers may receive an internal or external clock. Timer_A and Timer_B also include multiple independent capture and compare blocks, with interrupt capabilities.

Overview

The purpose of this laboratory is to build a sound generator using Timer_B. The PWM signal produced by this peripheral drives the buzzer, producing a sequence of musical notes at regular time intervals. At the same time, LED1 and LED2 switch state alternately. The volume of sound produced by the buzzer can be controlled by push buttons SW1 and SW2.

Resources

The implementation of this application ( Lab4_Timers.c ) requires the production of specific frequency signals corresponding to musical notes. For each frequency, the duty-cycle can be modified in order to control the volume of sound produced. This task is carried out using Timer_B and one of its compare units. The buzzer is operated by Port P3.5, configured to work in its special function as TB4 compare unit output. This output corresponds to the TBCCR4 output compare unit.

The push buttons SW1 and SW2 are connected to ports P1.0 and P1.1 respectively. An interrupt is generated when either of these buttons are pressed. The duty-cycle of the generated note is modified in response.

Basic Timer1 is configured to generate an interrupt once every second. The interrupt service routine updates the musical notes produced by the buzzer, which are stored in an array.

LED1 and LED2 are driven from P2.2 and P2.1 respectively, and their state is switched alternately once every second.

The module FLL+ is configured to a 7.995392 MHz frequency, for the MCLK and SMCLK clock signals.

The resources used by the application are:

- Timer_B;

- Basic Timer1;

- I/O ports;

- FLL+;

- Interrupts.

Software application organization

The application consists of the routine main() , which is used to configure all system resources, before entering into a standby mode, waiting for one of two interrupts.

This routine starts by disabling the watchdog timer and starting the module FLL+ to produce the desired clock signals of the correct frequency for the SMCLK and MCLK. Then, the Basic Timer1 and Timer_B are configured in order to perform the desired functions.