4.1 Doping

Starting with a prepared, polished wafer then how do we get an integrated circuit? We will focus on the CMOS process, describedin the last chapter. Let's assume we have wafer which was doped during growth so that it has a background concentration ofacceptors in it (i.e. it is p-type). Referring back to CMOS Logic , you can see that the first thing we need to build is a n-tank or moat. Inorder to do this, we need some way in which to introduce additional impurities into the semiconductor. There are severalways to do this, but current technology relies almost exclusively on a technique called ion implantation . A diagram of an ion-implanter is shown in the figure in the previous section . An ion implanter uses a dopant source gas, ionizes it, and drives the ions into the wafer. The dopantgas is ionized and the resultant charged ions are accelerated through a magnetic field, where they are mass-analyzed. Thevertical magnetic field causes the beam of ions to spread out, according to their mass. A thin aperture selects the ions ofinterest, and lets them pass, blocking all the others. This makes sure we are only implanting the ion we want, and in fact,even selects for the proper isotope! The ionized atoms are then accelerated through several tens to hundreds of kV, and thendeflected by an electric field, much like in an oscilloscope CRT. In fact, most of the time the ion beam is "rastered" acrossthe surface of the silicon wafer. The ions strike the silicon wafer and pass into its interior. A measurement of the currentflow in the system and its integral, is a measure of how much dopant was deposited into the wafer. This is usually given interms of the number of dopant $\frac{\mathrm{atoms}}{\mathrm{cm}^2}$ to which the wafer has been exposed.

After the atoms enter the silicon, they interact with the lattice, creating defects, and slowing down until finally theystop. Typical atomic distributions, as a function of implant voltage are show in for implantation into amorphous silicon. When implantation is done on single crystalmaterial, channeling, the improved mobility of an ion down the "hallway" of a given lattice direction, can skew the impuritydistribution significantly. Just slight changes of less than a degree can make big differences in how the impurity atoms arefinally distributed in the wafer. Usually, the operator of the implant machine purposely tilts the wafer a few degrees offnormal to the beam in order to arrive at more reproducible results.

As you might expect, shooting 100 kV ions at a silicon wafer probably does quite a bit of damage to the crystalstructure. Not only that, but just having, say boron, in your wafer does not mean you are going to have holes. For the boronto become "electrically active" - that is to act as an acceptor - it has to reside on a silicon lattice site. Even if the boronatom does, somehow, end up on an actual lattice site when it stops crashing around in the wafer, the many defects which havebeen created will act as deep traps. Thus, the hole which is formed will probably be caught at a trap site and will not beable to contribute to electrical conductivity in the wafer anyway. How can we fix this situation? If we carefully heat upthe wafer, we can cause the atoms in the crystal to shake around, and if we do it right, they all get back where theybelong. Not only that, but the newly added impurities end up on lattice sites as well! This step is called annealing and it does just what it is supposed to. Typical temperatures and times for such an anneal are 500 to1000C for 10 to 30 minutes.

Something else occurs during the anneal step however. We have just added, by our implantation step,impurities with a fairly tight distribution as shown in . There is an obvious gradient in impurity distribution, and if there is a gradient, than things may startmoving around by diffusion, especially at elevated temperatures.