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The phase locked loop

Perhaps the best loved method of phase tracking is known as the phase locked loop (PLL). This section shows that the PLLcan be derived as an adaptive element ascending the gradient of a simple performance function. The key idea is to modulatethe (processed) received signal r p ( t ) of [link] down to DC, using a cosine of known frequency 2 f 0 and phase 2 θ + ψ . After filtering to remove the high-frequency components, the magnitude of the DC term can be adjusted by changing the phase. The value of θ that maximizes the DC component is the same as the phase Φ of r p ( t ) .

To be specific, let

J P L L ( θ ) = 1 2 LPF { r p ( k T s ) cos ( 4 π f 0 k T s + 2 θ + ψ ) } .

Using the cosine product relationship [link] and the definition of r p ( t ) from [link] under the assumption that f c = f 0 , J P L L ( θ ) becomes

= 1 2 LPF { cos ( 4 π f 0 k T s + 2 Φ + ψ ) cos ( 4 π f 0 k T s + 2 θ + ψ ) } = 1 4 LPF { cos ( 2 Φ - 2 θ ) + cos ( 8 π f 0 k T s + 2 θ + 2 Φ + 2 ψ ) } = 1 4 LPF { cos ( 2 Φ - 2 θ ) } + 1 4 LPF { cos ( 8 π f 0 k T s + 2 θ + 2 Φ + 2 ψ ) } 1 4 cos ( 2 Φ - 2 θ ) ,

assuming that the cutoff frequency of the lowpass filter is well below 4 f 0 . This is shown inthe middle plot of [link] and is the same as J S D ( θ ) , except for a constant and a sign. The sign change implies that,while J S D ( θ ) needs to be minimized to find the correct answer, J P L L ( θ ) needs to be maximized. The substantive difference between the SD and the PLLperformance functions lies in the way that the signals needed in the algorithm are extracted.

Assuming a small stepsize, the derivative of [link] with respect to θ at time k can be approximated as

d LPF { r p ( k T s ) cos ( 4 π f 0 k T s + 2 θ + ψ ) } d θ θ = θ [ k ] LPF d r p ( k T s ) cos ( 4 π f 0 k T s + 2 θ + ψ ) d θ θ = θ [ k ] = LPF { - r p ( k T s ) sin ( 4 π f 0 k T s + 2 θ [ k ] + ψ ) } .

The corresponding adaptive element,

θ [ k + 1 ] = θ [ k ] - μ LPF { r p ( k T s ) sin ( 4 π f 0 k T s + 2 θ [ k ] + ψ ) } ,

is shown in [link] . Observe that the sign of the derivative is preserved in the update(rather than its negative), indicating that the algorithm is searching for a maximum of the error surface rather than a minimum.One difference between the PLL and the SD algorithms is clear from a comparison of [link] and [link] . The PLL requires oneless oscillator (and one less addition block). Since the performance functions J S D ( θ ) and J P L L ( θ ) are effectively the same, the performance characteristics of the two are roughly equivalent.

Suppose that f c is the frequency of the transmitter and f 0 is the assumed frequency at the receiver (with f 0 close to f c ). The following program simulates [link] for time seconds. Note that the firpm filter creates an h with a zero phase at the center frequency and so ψ is set to zero.

Ts=1/10000; time=1; t=Ts:Ts:time;       % time vector fc=1000; phoff=-0.8;                    % carrier freq. and phaserp=cos(4*pi*fc*t+2*phoff);              % simplified received signal fl=100; ff=[0 .01 .02 1]; fa=[1 1 0 0];h=firpm(fl,ff,fa);                      % LPF design mu=.003;                                % algorithm stepsizef0=1000;                                % assumed freq. at receiver theta=zeros(1,length(t)); theta(1)=0;   % initialize vector for estimatesz=zeros(1,fl+1);                        % initialize buffer for LPF for k=1:length(t)-1                     % z contains past fl+1 inputs  z=[z(2:fl+1), rp(k)*sin(4*pi*f0*t(k)+2*theta(k))];  update=fliplr(h)*z';                  % new output of LPF   theta(k+1)=theta(k)-mu*update;        % algorithm updateend
pllconverge.m simulate Phase Locked Loop (download file)

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Source:  OpenStax, Software receiver design. OpenStax CNX. Aug 13, 2013 Download for free at http://cnx.org/content/col11510/1.3
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