1.2 A dsp based class d audio amplifier  (Page 2/2)

The interrupt service routine

The process described in the previous section is executed in the Interrupt Service Routine (ISR). The ADC conversion is triggered by the ePWM block when the PWM period starts (every 102.4 msecs). The ADC generates an interrupt at the end of conversion. The interrupt service routine updates the PWM duty cycle (CMPA value) on the value of this sample. The new duty cycle will be loaded in the beginning of the next PWM period. The process is described in Figure 6.

Output stage:

This module contains the H-bridge, and a Low Pass Filter to remove high frequency components, leaving only the audio-frequency content. This module basically implements a Digital to Analog Converter using a PWM signal generator and a Low Pass Filter as shown in . This method is described in .

The basic configuration of a D-Class amplifier is the Half-Bridge (H-Bridge) configuration. Two output transistors operate as switches, driven by complementary PWM signals. One of the transistors is off (current through it is close zero), while the remaining one is on (voltage across it is close to zero), keeping the power dissipation very low.

The full-bridge Class D amplifier comprises two half bridges, driven by synchronized PWM signals, having two alternate conduction paths through the load, each one having a pair of transistor conducting while the remaining pair is off.

Implementation

This section will describe the process of building a Simulink model for code generation according to description in chapter .

In the first part the framework for interrupt handling will be created. The second section will describe the creation of the Interrupt Service Routine.

Interrupt

1. Create a new Simulink model
2. Add the "F2808 eZDSP" block from the Target Support Package TC2.

   

3. Add the "Hardware Interrupt" block from the C2808 DSP Chip Support group of the Target Support Package TC2.

   

   The Interrupt should be generated at the end of conversion of group A, (CPU Values=1 and PIE Values=1) as shown in Figure 12.

   

4. Double-click the Hardware Interrupt block and configure it as follows:

   

5. Add the "Function-Call Subsystem" block from the Ports and Subsystems group of the Simulink blockset.

   

6. Connect the blocks as shown in Figure 15. Save the model as "eZDSPF2808ClassD". You may also change colors, and name the blocks as shown here.

   

Pcm to pwm conversion

1. Double-click the Function-Call Subsystem block and delete the "In1" and Out1 blocks.

   

2. Add the "ADC" block from the C2808 DSP Chip Support group of the Target Support Package TC2.

   

   The block should be configured to use channel 0 of module A, triggered by ePWMxA, and post an interrupt at the end of conversion as shown:

   

3. Add two copies of the "ePWM" block from the C2808 DSP Chip Support group of the Target Support Package TC2. Name them ePWM1 and ePWM2.

   

   The blocks should be configured as shown in the following figures:

   

   

4. Add the "Shift Arithmetic" block from the Logic and Bit Operations group of the Simulink blockset, and configure it for shift 2 bits right.

   

   

5. Connect the blocks as shown in Figure 22.

   

Running the model:

1. Connect the system as shown in the following figures:

   

   

2. Build and run the model "CTRL-B".
3. The amplifier should start working, connect your audio source, and enjoy the music.

Things to try

This example's objective was to show the use of the F2808 blocks, it is certainly not the best implementation, but it serves as the basis for additional features and enhancements like:

• Use Oversampling
• Use the High-Resolution PWM
• Add Signal Processing (Filtering, Equalization, Gain Control) features to the amplifier

References

1. "eZdspTM F2808 Technical Reference", Spectrum Digital, 2005 (External Link)
2. David M. Alter, " Using PWM Output as a Digital-to-Analog Converter on a TMS320F280x", TI Application Report SPRAA88 , September 2008 (External Link)