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- 3-Pin SPI;
- Source clock ->SMCLK.
The following control registers are configured based on these characteristics:
UCB0CTL0 = 0x29;
//UCB0CTL0 =// UCCKPH|UCCKPL|UCMSB|UC7BIT|UCMST|UCMODEx|UCSYNC|
//UCCKPH (Clock phase) = 0b ->Data is changed on the
// first UCLK edge and captured on the following edge.//UCCKPL (Clock polarity) = 0b ->Inactive state is low
//UCMSB (MSB first select) = 1b ->MSB first
//UC7BIT (Character length) = 0b ->8-bit data
//UCMST (Master mode) = 1b ->Master mode
//UCMODEx (USCI mode) = 00b ->3-Pin SPI
//UCSYNC (Synch. mode enable) = 1b ->Synchronous modeUCB0CTL1 = 0x81;
//UCB0CTL1 =// UCSSELx | Unused |UCSWRST|
//UCSSELx (USCI clock source select)= 10b ->SMCLK
//UCSWRST (Software reset) = 1b ->normally set by a PUC
The system clock is configured to operate with a frequency of ~ 1048 kHz from the DCO. This frequency will be the working base frequency of the USCI module. The connection operates at a clock frequency of ~ 500 kHz. Configure the following registers:
UCB0BR0 = 0x02;
UCB0BR1 = 0x00;// DATA RATE
// Data rate = SMCLK/2 ~= 500kHz// UCB0BR1 = 0x00&UCB0BR0 = 0x02
In order to set the external interfaces at the USCI module, it is necessary to configure the I/O ports. Select the USCI peripheral in SPI mode, matching the connections provided at the Experimenter’s board:
P3SEL |= 0x0E; // P3.3, P3.2, P3.1 option select
The SPI connection will operate on the following mode:
- MSB first;
- 8-bit data.
- Slave mode;
- Clock phase ->Data is changed on the first SCLK edge and captured on the following edge;
- USI counter interrupt enable.
The following control registers are configured based on these characteristics:
USICTL0 = 0xE3;
//USICTL0 =//USIPE7|USIPE6|USIPE5|USILSB|USIMST|USIGE|USIOE|USISWRST
//USIPE7 (USI SDI/SDA port enable) = 1b ->USI enabled
//USIPE6 (USI SDO/SCL port enable) = 1b ->USI enabled
//USIPE5 (USI SCLK port enable) = 1b ->USI enabled
//USILSB (LSB first) = 0b ->MSB first
//USIMST (Master) = 0b ->Slave mode
//USIGE (Output latch control) = 0b ->Output latch
// enable depends on shift clock//USIOE (Serial data output enable) = 1b->Output enable
//USISWRST (USI software reset) = 1b ->Software resetUSICTL1 = 0x10;
//USICTL1 =//USICKPH|USII2C|USISTTIE|USIIE|USIAL|USISTP|USISTTIFG|USIIFG
//USICKPH (Clock phase select) = 0b ->Data is changed
// on the first SCLK edge and captured on the following edge//USII2C (I2C mode enable) = 0b ->I2C mode disabled
//USISTTIE (START condition interrupt) = 0b ->Not used
//USIIE (USI counter) = 1b ->Interrupt enabled
//USIAL (Arbitration lost) = 0b ->Not used
//USISTP (STOP condition received) = 0b ->Not used
//USISTTIFG (START condition int. flag) = 0b ->Not used
//USIIFG (USI counter int. flag) = 0b ->No int. pending
Once the USCI module is configured in accordance with the previous steps, initiate the experiment with the files Lab2_Comm_1.c (master – MSP430FG4618) and Lab2_Comm_2.c (slave – MSP430F2013), compiling them and running them on the Experimenter’s board.
For this laboratory, it is necessary to set the following jumper settings:
- PWR1/2, BATT, LCL1/2, JP2;
- SPI: H1- 1&2, 3&4, 5&6, 7&8.
Once the program code is running in the two microcontrollers, monitor LED3 on the Experimenter’s board. It will blink with a period of 4 seconds.
This example and many others are available on the MSP430 Teaching ROM.
Request this ROM, and our other Teaching Materials here (External Link)
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